1. Field of the Invention
The present invention relates to semiconductor devices employing heterostructures. More specifically, the invention relates to a multi-state memory device which provides the functionality of a static random access memory (SRAM) cell using only a single component.
2. Description of the Prior Art
Previously, heterostructures have been combined with super-lattice structures to create single-component, multi-state semiconductor devices. For example, U.S. Pat. Nos. 4,853,753; 5,017, 973; and 4,849,934 all disclose single-component, multi-state semiconductor devices. The voltage-current characteristics of all these prior art devices can be illustrated by a single curve. Since the current-voltage curves of these devices contained multiple peaks, the peaks have been used to represent different memory states in various applications.
The reliance of prior art devices on a single current-voltage curve has proven to have disadvantages in applications requiring non-volatile memory. In order for the memory to be maintained in the prior art devices, the bias voltage has to be maintained constant. If the bias voltage shifts then the memory state of the device shifts and the stored memory is lost.
The power costs of having to maintain the bias voltage is another disadvantage of prior art multistate semiconductor devices. A device that does not require that the bias voltage be maintained in order to retain memory could have greater power efficiency.
The present invention overcomes these disadvantages of the prior art devices by not requiring that a bias voltage be maintained to maintain memory while also providing a new multistate memory capability.